Good understanding of full ASIC design stream.
Good understanding of a number of of:
- Signal-off timing/STA
- Signal-off gate stage energy
Working information of HDL languages. Good communication and debugging expertise. Good
TCL and Perl scripting information is a plus.
Supplies technical assist to Synopsys prospects and area engineers. Helps to resolve points associated to Synopsys merchandise throughout design.
Help course of contains:
- Reproducing buyer eventualities on inner testcases
- Offering workarounds for product bugs.
- Assist in adoption of Synopsys merchandise and options by the shoppers
- Documenting the options and publishing options
- Could also be concerned in buyer coaching.
Supplies options for points masking
- Product defects
- Interoperability between totally different domains and instruments and so on..
- Stories design, reliability and upkeep points to R&D.
- Stories buyer’s new requirement as enhancements to R&D
- Observe up with the shopper and R&D for the closure of the problems